Posts for: #pcie

Raspberry Pi Unveils PCIe FFC Connector and New HAT+ Specifications

Raspberry Pi Unveils PCIe FFC Connector and New HAT+ Specifications

One of the most notable features of the new Raspberry Pi platform is its small, vertical, 16-way FFC (Flat Flexible Cable) connector on the left-hand side of the board. This connector exposes a single-lane PCI Express interface.

The Peripheral Component Interconnect Express (PCI Express or PCIe) is a board-level interconnect that enables high-speed data transfer between a processor chip and external peripherals such as NVMe SSDs, Ethernet cards, and AI/ML accelerators. PCIe achieves this by serializing data transfers and sending one bit at a time down a single channel. Each channel consists of one or more differential pairs on the PCB, which are controlled waveguides made by closely spaced wires. In the case of a single-lane PCIe interface, there is a single transmit pair, a single receive pair, and a clock pair, requiring three differential pairs and six wires. The Raspberry Pi 5, based on the BCM2712 processor, is connected to the RP1 I/O controller via an ×4 interface.

The PCIe specification also requires sideband signals such as reset, clock request, and wakeup. The 16-way connector on the Raspberry Pi provides all these signals, along with two pins for controlling board power and automatically detecting a properly designed PIP (PCIe Peripheral) by the Raspberry Pi firmware.

Instead of adding an M.2 connector to the Raspberry Pi 5, which would be large, relatively expensive, and require a 3.3V, 3A power supply, the Raspberry Pi team opted for a small, low-cost FFC connector. This allowed them to provide a PCIe interface without increasing the board size or imposing additional costs on users.

At the launch of the Raspberry Pi 5, the team did not have a specification for building peripherals that attach to the 16-way PCIe connector. They wanted to thoroughly test their own prototype product and consider the interaction of PCIe peripherals with Raspberry Pi power states and firmware. They have now released the first revision of the specification and are in the final stage of prototyping their own M.2 M Key HAT+. This HAT+ will be launched early next year.

In addition to the PCIe connector specification, the Raspberry Pi team has also released a preliminary version of the new HAT+ specification. The original HAT specification, written in 2014, is in need of an update. The new specification simplifies certain aspects, including the required EEPROM contents, and consolidates everything into one document. It also adds new features. While there is still work to be done on this standard and the EEPROM utilities have not been updated, this release provides a glimpse into the changes in the HAT standard.

The Raspberry Pi team wanted to ensure that the HAT+ standard is developed correctly, as it is expected to be in use for as long as the old HAT standard. They believe that PCIe boards (PIPs) that go on top of the Raspberry Pi should be HAT+ boards, and their own M.2 HAT+ will adhere to this standard.

More information can be found in the first revision of the Raspberry Pi Connector for PCIe datasheet, and the Raspberry Pi HAT+ Specification datasheet.

MicroSD Express Memory Cards to Enable Fast 2GB/s Data Transfers

SD Association (SDA) has announced the new SD 9.1 specification that doubles the speed of microSD Express memory card speed up to 2GB/s, defines four new SD Express Speed Classes to ensure guaranteed minimum sequential performance levels, and adds support for multi-stream access and related power and thermal management to assure the guaranteed performance.

The new SD 9.1 specification doubles the speed of microSD Express cards, with a maximum speed of 1,969 MB/s achievable over a PCIe Gen4 x1 interface. The cards remain backward compatible with the existing microSD card standard at the lower UHS speeds. The specification also introduces four SD Express classes with minimum guaranteed speeds.

Three new features have been defined in the SD 9.1 specification: power management through maximum power values, thermal management with specific thresholds, and an access rule for multi-stream recording.

While several companies have announced microSD and SD Express cards, they are not yet commercially available. It remains to be seen whether these types of SD cards will be widely adopted.

The press release and white paper provide additional details about the new features added to the SD 9.1 specification.

Source: CNX Software – Embedded Systems News.

COM-HPC 1.2 Specification Unveiled: Introducing COM-HPC Mini 95x70mm Form Factor

PICMG has announced the release of the COM-HPC 1.2 specification, which includes the new COM-HPC Mini form factor. This form factor, about the size of a credit card at 90x75mm, provides access to high-speed interfaces such as PCIe Gen5, USB4, and 10GbE.

The COM-HPC Mini form factor is a smaller version of the COM-HPC standard, designed for applications like autonomous mobile robots, drones, and mobile 5G test and measurement equipment. It offers a compact solution for edge computing.

The COM-HPC 1.2 “Mini” modules come with a single 400-pin connector and various interfaces, including storage with 2x SATA ports (shared with PCIe lanes), display with 1x eDP and 2x DDI, networking with 2x 10 Gbps NBASE-T Ethernet ports, USB with 8x SuperSpeed lanes for USB4/ThunderBolt or USB 3.2, 8x USB 2.0, PCIe with 16x PCIe lanes supporting PCIe 4.0 or PCIe 5.0, and miscellaneous features such as boot SPI and eSPI, UART, CAN, Audio, FUSA, and power management signals.

The COM-HPC Mini modules support cameras via an FFC connector with a MIPI CSI interface. The input voltage ranges from 8V to 20V DC, and the modules can handle up to 107W of input power. The dimensions of the modules are 95 x 70 x 15 mm.

While the COM-HPC 1.2 specification has been released and is available for download, it comes at a cost of 750 Euros. The information provided above is based on a press release, as access to the specification is required to obtain further details.

It is unclear when companies like congatec or ADLINK will release actual COM-HPC Mini modules. However, PICMG plans to release a “COM-HPC 1.2 Carrier Design Guide” in early 2024, suggesting that announcements may be expected later in the first half of 2024.

Source: CNX Software – Embedded Systems News.